Netra CP2140 Technical Reference and Installation Manual

816-4908-10

Contents

Contents

Figures

Tables

Code Samples

Safety Agency Compliance Statements

Regulatory Compliance Statements

Declaration of Conformity

Declaration of Conformity

Preface

Who Should Use This Book

How This Book Is Organized

Related References

Sun Microsystems Publications

Reference Documents

Typographic Conventions

Shell Prompts

Accessing Sun Documentation Online

Sun Welcomes Your Comments

1. Introduction

1.1 Netra CP2140 Board System Configuration

1.2 Features of Netra CP2140 Board CompactPCI Host Board

1.3 Hot-Swap Support

1.4 Front Panel I/O Connectors and Indicators

1.5 Software Requirements

1.6 Determining Netra CP2140 Board Identification Numbers

1.6.1 Netra CP2140 Board Assembly Identification

1.6.2 Determining Firmware Versions

1.6.3 Determining Software Version

1.7 Technical Support and Warranty

2. Installation

2.1 System Configurations

2.2 Orderable Items

2.3 Preinstallation Checklist

2.3.1 System Checklist

2.3.2 Viewing Web Pages and Reading Documents

2.3.3 Power Budgeting

2.3.4 Getting the Latest OpenBoot PROM Version

2.3.5 Completing Space, Network, and Environmental Planning

2.3.6 Determine Local Network IP Addresses and Host Names

2.4 Safety

2.5 Installation Procedure Summary

2.6 Materials and Tools Required

2.7 Configuring the Netra CP2140 Board Hardware

2.7.1 Installing Memory Modules

2.7.2 PMC Module Installation

2.8 Configuring Transition Card Hardware

2.8.1 Installing PIM Assemblies

2.8.2 Replacing the Serial EEPROM

2.9 Installing the XCP2040-TRN I/O Transition Card

2.10 Installing the Netra CP2140 Board

2.11 Connecting Cables to the Netra CP2140 Board

2.11.1 Powering on Your System With External SCSI Peripherals

2.12 Hot-Swapping the Netra CP2140 Board

2.12.1 Basic Hot-Swapping

2.12.2 Full Hot-Swapping

2.13 Connecting Devices to a XCP2040-TRN I/O Transition Card

2.13.1 Adding CompactPCI Cards and Drivers to a Netra CP2140 Board System

2.13.1.1 To Install a CompactPCI Card

2.13.1.2 To Verify That the Board is Recognized by the System

2.13.1.3 To Obtain Additional Assistance

2.13.2 Backplane and Cardcage Considerations

2.14 Initial Power-On and Firmware Update

2.15 Software Installation

2.16 Setting Up a Network

2.17 Standalone Operation

3. Netra CP2140 Board Specifications

3.1 Board Features and Specifications

3.1.1 CPU

3.1.2 Main Memory

3.1.3 PCI Mezzanine Module (PMC) Interface

3.1.3.1 Estimated Power Requirements

3.1.4 Mechanical

3.1.5 Environmental Specifications

3.1.6 Reliability and Availability

3.1.7 Compliance

3.1.8 Safety

4. Hardware Description

4.1 Physical

4.2 Summary Description

5. Functional Description

5.1 Functional Blocks

5.1.1 UltraSPARC IIi Processor

5.1.2 SDRAM Memory

5.1.3 Firmware

5.1.3.1 System (Boot) Flash Memory

5.1.3.2 User Flash Memory

5.1.3.3 NVRAM

5.1.3.4 Serial I²C EEPROM

5.2 Clock Frequencies

5.3 Bus Subsystems

5.3.1 APB PCI Bus Interfaces

5.3.2 PCIO-2 A and PCIO-2 B Devices and EBus Paths

5.3.3 CompactPCI Bus

5.3.4 System I/O

5.3.5 PMC and PIM Interface

5.3.6 System Management Controller

5.3.7 Watchdog Timer

5.4 Reset and Interrupts

5.4.1 CPU Reset

5.4.1.1 Power On

5.4.1.2 Power Off

5.4.2 Reset Modes

5.5 Power Subsystem

5.5.1 Power Module

5.5.2 Early Power and IPMI Power

5.6 Hot Swap

5.7 Programmable Logic Device (PLD)/Arbiter

6. Firmware

6.1 Initialization Firmware

6.1.1 Firmware CORE and BPOST

6.1.2 CPOST and EPOST

6.1.3 OpenBootPROM

6.1.4 Example of a show-devs Device Tree

6.1.5 Example of devalias Command

6.2 Firmware NVRAM Variables

6.2.1 Firmware CORE NVRAM Variables

6.2.2 Firmware CORE Execution Control

6.2.3 OpenBoot PROM Configuration Variables

6.3 Firmware Memory Map

6.4 Firmware CORE Features

6.5 ASM Support

6.6 Determining Firmware Version

6.6.1 From OpenBoot PROM

6.6.2 If Running Solaris Software

6.7 OpenBoot PROM Flash Update

6.7.0.1 Accessing SMC Config Block

6.7.0.2 Using Flash Update Commands

6.7.0.3 Field CORE/OpenBoot PROM Firmware Upgrade

6.7.0.4 Sequence to Boot Up the Correct OpenBoot PROM Image

6.7.1 SMC Firmware Update

6.7.2 IPMI Packet

6.8 Host-to-Host Communication

6.8.1 Packet

6.8.2 Event Receiver

6.8.3 Protocol

6.8.4 Generating an Event From SPARC to Send to Another SPARC

6.9 SMC Implementation Note

6.10 Firmware Diagnostics

6.10.1 Setting Diagnostic Levels

6.10.2 Basic POST (BPOST)

6.10.3 Comprehensive POST (CPOST)

6.10.4 Extended POST

6.10.5 OpenBoot PROM Onboard Diagnostics

6.10.6 OpenBoot Diagnostics

A. Connector Pinouts and Switch Settings

A.1 CompactPCI Connectors

A.1.1 Mini Din 8-Pin Connector

A.1.2 RJ45 Connector

A.1.3 PMC Connectors

A.1.4 PMC J3002 Connector

A.1.5 PMC J3003 Connector

A.2 Memory Module Connector Pinout

A.3 SMC Switch Settings for HA and Non-HA Systems

A.3.1 Setting Non-HA Systems

A.3.2 Setting HA Systems

A.4 SCSI and Flash Switch Settings

A.4.1 Flash Device Selection Switches

A.4.2 SCSI Termination Switches

B. Mechanical Drawings

C. SunVTS

D. Solaris Sun FRU ID

D.1 Prtfru Command

Glossary

Index