Figures

FIGURE 1-1 Typical Netra CP2300 cPSB Board 1-2

FIGURE 1-2 Netra CP2300 cPSB Board Mounting Configuration Examples 1-5

FIGURE 1-3 Netra CP2300 cPSB Board Rear Transition Card 1-6

FIGURE 1-4 Typical cPSB System Chassis Illustrating the Netra CP2300 Board and the Netra CP2300 Transition Card 1-7

FIGURE 1-5 Typical Netra CP2300 cPSB Board Barcode Labelling 1-13

FIGURE 2-1 Location of SO-DIMM Memory and PMC Slots 2-7

FIGURE 2-2 Installing SO-DIMM Memory Module 2-8

FIGURE 2-3 Removing a SO-DIMM Memory Module 2-9

FIGURE 2-4 Removing the PMC Filler Panel 2-11

FIGURE 2-5 Inserting the PMC Into the PMC Slot 2-12

FIGURE 2-6 Pressing the PMC Into the PMC Connectors (Side View) 2-12

FIGURE 2-7 Securing the PMC Screws 2-13

FIGURE 2-8 Replacing the Serial I ² C EEPROM 2-14

FIGURE 2-9 Installing the Netra CP2300 Transition Card 2-16

FIGURE 2-10 Installing a Netra CP2300 Board Into a cPSB Chassis Slot 2-17

FIGURE 3-1 Releasing the Netra CP2300 Board Handles 3-2

FIGURE 4-1 Control Flow from Power On for Firmware CORE and Client Modules--Solaris Case 4-2

FIGURE 4-2 System Flash PROM Map 4-13

FIGURE 4-3 System Flash and User Flash Logical Devices on Same Physical Device 4-20

FIGURE 4-4 SW3 DIP Switch Location 4-22

FIGURE 4-5 Exchanged System Flash and User Flash Logical Devices 4-23

FIGURE 5-1 Netra CP2300 Board Layout 5-2

FIGURE 5-2 Typical Netra CP2300 Board - Solder Side 5-3

FIGURE 5-3 Front Panel of a Typical Netra CP2300 Board Assembly With Heat Sink 5-4

FIGURE 5-4 Netra CP2300 Board Functional Block Diagram 5-5

FIGURE 5-5 UltraSPARC IIi Interface 5-7

FIGURE 5-6 Memory Mapping Example 5-8

FIGURE 5-7 SDRAM Memory Interface 5-9

FIGURE 5-8 Netra CP2300 PCI Bus Interface, 5-11

FIGURE 5-9 PIM Installation Configuration 5-13

FIGURE 5-10 Data Paths in PCI Mezzanine Module Interface on Host Board 5-14

FIGURE 5-11 PMC Connector Interfaces on the Netra CP2300 Board 5-15

FIGURE 5-12 Netra CP2300 Board I ² C and SMBus Architecture 5-17

FIGURE 5-13 Netra CP2300 Board and Transition Card I/O Interfaces 5-18

FIGURE 5-14 Netra CP2300 Board Front Panel 5-19

FIGURE 5-15 System Management Controller Interface 5-21

FIGURE 5-16 Simplified Reset Paths 5-24

FIGURE 5-17 Simplified CPU Subsystem Reset Architecture 5-25

FIGURE 5-18 Power Distribution Block Diagram 5-26

FIGURE 5-19 Power Module Interface 5-27

FIGURE 5-20 DIP Switch SW3 Settings on Power Block 5-28

FIGURE 5-21 Selection Between Early Power and IPMI Power 5-29

FIGURE 5-22 Transition Card Power Supply Routing 5-30

FIGURE A-1 SO-DIMM Memory Module Dimensions A-4

FIGURE A-2 Mechanical Illustration of the Netra CP2300 Front Panel A-8

FIGURE B-1 Netra CP2300 Board PMC Port Connectors B-2

FIGURE B-2 Front Panel Serial Port (TTYA) Diagram B-11

FIGURE B-3 Backplane Connector Contact Numbering B-12

FIGURE B-4 SW3 DIP Switch Location and Default Settings B-20

FIGURE B-5 Location and Default Settings of the SW501, SW502, and SW503 DIP Switches B-22

FIGURE B-6 Netra CP2300 cPSB Transition Card EIDE and PIM Connector Locations B-24