A P P E N D I X A - Specifications

Specifications for the Netra CP2160 board are provided in the following sections:

A.1 System Compatibility Specifications

TABLE A-1 System Compatibility Attributes
Property	Specification
Satellite board capability	Yes
System host capability	Yes
H110 chassis compatible	CompactPCI J4 is unconnected at the board; which enables this board to be used in H110 chassis
NEBS compliance	NEBS Level 3 specification compliance
CompactPCI compliance	PICMG 2.0 R3.0 CompactPCI bus specification for 33MHz PCI speed PICMG 2.1 R1.0 Hot Swap specification PICMG 2.9 System Management specification

A.1.1 CPCI Specification Notes

The CPCI standard, PICMG 2.0 Rev 3, calls out the maximum component heights of 13.71 +/- 0.03 mm. Due to variations in parts, board flatness, board thickness, and manufacturing tolerances, the memory turrets installed on a Netra CP2160 board may exceed this limit.

PICMG 2.0 Rev 3 and IEEE 1101.10-1996 requires 2.54mm between the top of components and the separation plane, and there is at least approximately 0.5mm to 2mm of clearance to solder-side components or leads of an adjacent board from that same separation plane. Therefore, there is very little chance that a small specification violation will impact an adjacent card in a PICMG 2.0 Rev 3 compliant chassis.

Care should be taken when installing the boards in systems that have extreme solder-side component heights or in system chassis that don't allow clearances specified in the PICMG or IEEE standards.

The Netra CP2160 board also has a solder side cover installed. The components on the solder side cover meet the limits of the CPCI specification for maximum height. The solder side cover is nominally 1mm thick. When this cover rests upon components greater than 1mm in height, the cover itself may violate the CPCI specification where it rests on these components.

A.2 CPU Specifications

TABLE A-2 CPU Specification
Property	Specification
CPU	650 MHz UltraSPARC IIi
Mounting	370-pin ceramic PGA package soldered to board
Architecture	Sun 4U; 64-bit SPARC V9 architecture with the VIS instruction set
Cache	Integrated, 512 Kbyte, 4-way, set-associative internal L2 cache operating in 2:2 mode
PCI bus local interface	PCI Bus 2.1 compatible, 33/66 MHz, 32-bit, 3.3V (internal to board only, does not come on connector)

A.3 Main Memory Specifications S

TABLE A-3 Memory Specification
Property	Specification
Memory size--min	1 GB
Memory size--max.	Up to 2 GB
Onboard memory	1 GB on-board memory, with an additional 1 GB double-wide memory available for order
Memory combinations	One custom 198-pin stackable module; see TABLE A-4 for allowable combinations
Memory type	3.3V, synchronous DRAM with ECC LVTTL-compatible CMOS; configured on bus width of 64-bit + 8-ECC bits
Identification to system	Serial EEPROM provides serial presence detect (SPD) to IPMI interface
ECC	8-bit; single bit error correction; double-bit error detection

A.4 Memory Configuration Specifications

The default memory configuration on the Netra CP2160 board is 1 GB. The possible memory configurations are shown on TABLE A-4.

TABLE A-4 Memory Module Configurations Available on CP2160
Onboard memory	Top SDRAM Module P/N and Specification	Total Memory Available on Board
1 GB	none	1 GB
1 GB	375-3026-xx 1GB	2 GB

For directions on the installation process of the stackable memory modules on the Netra CP2160 board, refer to the document Memory Module Installation and Removal Guide for Netra CP2000/CP2100 Series CompactPCI Boards (817-0654-xx).

A.5 PMC Interface Specifications

TABLE A-5 PMC Interface Specification
Property	Specification
PMC module interfaces on system board	Two: PMC A and PMC B
Interface IEEE P1386.1 compliance	With draft 2.1
Connector configuration, PMC A (P1386 designations)	J21, J22 carry PCI signals; J24 module I/O is connected to CPCI backplane J5; J23 ^[1]
Connector configuration, PMC B (P1386 designations)	J11, J12 carry PCI signals; J14 module I/O is connected to CPCI backplane J3
PMC connections to CPCI backplane	PMC A on J5; PMC B on J3
PCI clock	33 MHz
PCI bus width	32-bit
Max power load -- per module, combined power rails (5V, 3.3V, 12V, -12V)	7.5 W²

A.5.1 PMC Specification Notes

The PMC standard, IEEE 1386, calls out the maximum component height of 4.70 mm below a PMC card. This allows for a 0.6 mm gap separating components on the motherboard from components on the PMC card. The Netra CP2160 board utilizes a standard memory connector that is nominally 5.2mm tall. This means that there would be only 0.1 mm of clearance in two areas below the PMC slot closest to the CPU (PMC B )in the area of two motherboard memory sockets of 4.93 mm by 43.40 mm.

The PMC A slot is not affected by the memory socket height. When at all possible, install any PMC cards that barely meet or exceed PMC component height restrictions in the PMC A slot. PMC disk drive cards in particular may impact the memory connectors on PMC B, as some commercially available PMC disk cards meet or exceed component height restrictions.

A.6 Power Requirements

This section provides information on power sequencing and power requirements by connection phase.

TABLE A-6 Netra CP2160 Backplane Connector Power Requirements by Connection Phase
Power Rail	Early power on long pins ^[2] Typ. (A)	Main power on medium pins:^[3] Typical (with 1 GB total memory)	Main power on medium pins: Typical (with 2GB total memory)^[4]	Description
+5V ^[5]	0.35	3.0A	3.0A	at connector J1/J2
+3.3V	0.02	3.0A	3.4A	at connector J1/J2
+12V	0.00	15mA	15mA	at connector J1/J2
-12V	0.00	15mA	15mA	at connector J1/J2
IPMB_PWR,	--	--	--	at J1/A4

A.7 Mechanical Specifications

These products comply with the mechanical specifications to be found in the CompactPCI specification PICMG 2.0 R3.0. See Appendix D for a reference to this specification.

A.8 Environmental Specifications

TABLE A-7 Environmental Conditions and Limits
Ambient Conditions	Low Limit ^[6]	High Limit
Transportation and storage temperature	-40⁰ C	+70⁰ C
Transportation and storage humidity	5% RH ^[7] non-condensing	95% RH non-condensing
Operating temperature	0⁰ C (-5⁰ C short term)	40⁰ C (55⁰ C short term)
Operating humidity	15% RH non-condensing	85% RH (90% RH short term) non-condensing
Shock and vibration	As stated in NEBS GR-63 CORE specifications, section 4.3.1 and 4.3.2 for shock criteria and 4.4.3 for vibration criteria; MIL-STD 810E, Method 514.4, CAT I MIL-STD 810E, Method 516.4, II-3.2
Electrostatic discharge	NEBS GR-1089 Section 2

A.9 Thermal Validation

The ASM CPU sensor should not exceed 85⁰ C when installed in the system. Refer to the Netra CP2000 and CP2100 Series CompactPCI Boards Programming Guide
(816-2485-xx) for more information on ASM thermal validation.

A.10 Reliability/Availability Specifications

Reliability prediction is the first measurement point of expected behavior of the inherent design mean time between failures (MTBF) of the product. MTBF values calculated are shown in TABLE A-8.

TABLE A-8 Reliability Prediction for Board Level MTBF
Items	MTBF (hours)	Annualized Failure Rate (AFR in %)^[8]
Netra CP2160 board ^[9] (includes 1 GB soldered memory and power module)	180,098	4.75%
XCP2060-TRN card	2,083,333	0.42%
Memory card 1GB (P/N 375-3026-01)	758,529	1.15%

A.11 Compliance Specifications

A.11.1 Agency Compliance

All printed wiring boards (PWBs) are manufactured by UL recognized manufacturers, and have a flammability rating of 94-V0 or better.

Compliance with EMI and safety regulations for products including the Netra CP2160 board is entirely the responsibility of OEMs. The Netra CP2140 board has passed FCC Class B tests in representative enclosures. However, the EMI Class of the end use system is dependent upon system level EMI design parameters.

The Netra CP2160 boards are intended to be incorporated into systems meeting the following regulations and compliances:

A.11.2 NEBS Level 3

Board requirements for NEBS Level 3 criteria provide the highest assurance of product operability with minimal service interruptions over the life of the equipment. The requirements include the following categories and all associated sections and subcategories:

^{1 (TableFootnote) J23 is for internal Sun Microsystems use only and is not installed}

^{2 (TableFootnote) The typical figures provided for early power are only provided as examples}

^{3 (TableFootnote) The typical figures are calculated as measured on a similar cPCI board, no PMC cards, with or without the XCP2060-TRN I/O Transition Card and while running SunVTS.}

^{4 (TableFootnote) The maximum memory supported is up to 2GB.}

^{5 (TableFootnote) The V I/O on the backplane is connected to 5V.}

^{6 (TableFootnote) Short term, in this column, refers to a period of not more than 96 consecutive hours and a total of not more than 15 days in 1 year.}

^{7 (TableFootnote) RH is relative humidity.}

^{8 (TableFootnote) AFR (%) is Annualized Failure Rate based on 8,760 power on hours (POH) per year.}

^{9 (TableFootnote) Board ambient temperature at 40^{0 (Footnote)} C}