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Automatic variables

Suppose you are writing a pattern rule to compile a ‘.c’ file into a ‘.o’ file: how do you write the ‘cc’ command so that it operates on the right source file name? You cannot write the name in the command, because the name is different each time the implicit rule is applied. What you do is use a special feature of make, the automatic variables. These variables have values computed afresh for each rule that is executed, based on the target and dependencies of the rule. By example, you would use ‘$@’ for the object file name and ‘$<’ for the source file name.

The following is a list of automatic variables.
 

The following is a list of the variants.

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