-C H A P T E R

C H A P T E R 4

Level 1 Data Cache Test (l1dcachetest)

l1dcachetest exercises the level1 Data cache in the CPU module of Sun systems. The test writes, reads, and verifies access of multiple virtual addresses. The virtual addresses are so chosen that they cause targeted hits and misses in the cache. The test dynamically determines the size and organization of the cache and tunes the test accordingly to be effective on the l1dcache.

The P-cache subtest of l1dcachetest provides diagnostic coverage for Prefetch cache present in UltraSPARC III+ and UltraSPARC IV processors. The Prefetch cache is a small (2 Kbytes) cache that is accessed in parallel with Data cache for floating-point loads. This subtest tests the Data SRAM of the prefetch cache, and uses stress testing by applying March SS and March SAM algorithms on the data SRAM. This subtest is performed in Exclusive test mode only.

l1dcachetest Options

To reach the dialog box below, right-click on the test name in the System Map and select Test Parameter Options. If you do not see this test in the System Map, you might need to expand the collapsed groups, or your system may not include the device appropriate to this test. Refer to the SunVTS User's Guide for more details.

FIGURE 4-1 l1dcachetest Test Parameter Options Dialog Box

Screenshot of the l1dcachetest Test Parameter Options dialog box.

TABLE 4-1 `l1dcachetest` Options
Option	Description
Thrash Cycles	Specifies the number of thrashing cycles the test completes for the level1 cache on the system. Default value for Exclusive mode is 256.
Test Buffer Size	Sets the size of the buffer, in KBs, that the test allocates for testing. Default value is 64.

Note - The Test Buffer Size option will not be supported in a future release of SunVTS. The reason for this is that the test will dynamically determine the size of the cache and set the buffer size appropriately.

Note - The l1dcachetest is automatically bound to a processor. Users are advised to not use the Processor Affinity option for the l1dcachetest.

l1dcachetest Test Modes

TABLE 4-2 `l1dcachetest` Supported Test Modes
Test Mode	Description
Connection	Performs the Connection subtest.
Exclusive	Performs only the `l1dcachetest` (full test).

l1dcachetest Command-Line Syntax

/opt/SUNWvts/bin/l1dcachetest standard_arguments -o [
[ dev=cpu-unitN ][ count=number ][ buffer=number ] ]

Note - The l1dcachetest is now per CPU, and N is the CPU number (0,1,2, etc.). Therefore, if the system has five CPUs (CPUs 1, 2, 5, 6, and 7), you can perform l1dcachetest on each CPU individually by specifying which CPU you want to verify when invoking the test. For example, if you want to perform l1dcachetest on CPU 7, you would enter the following:
/opt/SUNWvts/bin/l1dcachetest -generic_options -o dev=cpu-unit7

64-bit tests are located in the sparcv9 subdirectory: /opt/SUNWvts/bin/sparcv9/testname. If a test is not present in this directory, then it may only be available as a 32-bit test. For more information refer to "32-Bit and 64-Bit Tests section of the SunVTS Test Reference Manual.

TABLE 4-3 `l1dcachetest` Command-Line Syntax
Argument	Description
`dev=cpu-unit`N	Specifies the name of the device.
`count=`number	Specifies the number of thrashing cycles the test completes for the level1 cache on the system. Default value for Offline mode is 256.
`buffer=`number	Sets the size of the buffer, in KBs, that the test allocates for testing. Default value is 64.