| Netra CP2300 cPSB Board Installation and Technical Reference Manual |     |
| Netra CP2300 cPSB Board Installation and Technical Reference Manual | |
Netra CP2300 cPSB Board Installation and Technical Reference Manual
816-7186-12
|
Contents |
1. Overview of the Netra CP2300 cPSB Board
1.1 Features of the Netra CP2300 cPSB Board
1.2 Netra CP2300 Board System Configurations
1.5 Technical Support and Warranty
1.5.1 Board Part Number, Serial Number, and Revision Number Identification
2.1 Equipment and Operator Safety
2.2 Materials and Tools Required
2.3 Preparing for the Installation
2.3.1 Checking Power, Thermal, Environmental, and Space Requirements
2.3.2 Determining Local Network IP Addresses and Hostnames
2.3.3 Installation Procedure Summary
2.4 Configuring the Board Hardware
2.4.1 Installing SO-DIMM Memory Modules
2.4.2 Installing Optional PMC Devices
2.4.4 Replacing the Serial EEPROM
2.4.5 Configuring Transition Card Hardware
2.5 Installing Boards Into the cPSB Chassis
2.5.1 Installing the Netra CP2300 Transition Card
2.5.2 Installing the Netra CP2300 Board
2.6 Setting Up an Assembled Netra CP2300 Board
2.7 Initial Power On and Firmware Upgrade
2.7.3 Determining the Firmware Version
2.7.4 Upgrading the OpenBoot PROM Firmware
3.1.1 Hot-Swapping the Netra CP2300 Board
3.1.2 Retrieving Device Information
3.2.1 Setting the Time of Day In a Networked Configuration
3.2.2 Setting the Time of Day on a Standalone System
3.3 Downloading and Installing SunVTS
4.2 Firmware Configuration Variables
4.2.1 Firmware CORE Execution Control
4.2.2 OpenBoot PROM Configuration Variables
4.3 System Flash PROM Memory Map
4.5 Environmental Monitoring Support at OpenBoot PROM
4.5.2 Reading the CPU Temperature and OpenBoot PROM Temperature Limits
4.7.1 Exchanging the System and User Flash Memory Devices
4.7.2 Determining the Flash Memory Settings
4.8.1 Setting Diagnostic Levels
4.8.3 Comprehensive POST (CPOST)
4.8.4 OpenBoot PROM On-Board Diagnostics
5. Hardware and Functional Description
5.1 Summarized Physical Description
5.3 CPU and Main Memory Subsystems
5.3.1 UltraSPARC IIi Processor
5.6 System Management Controller
5.8.2 Early Power and IPMI Power
5.8.3 Transition Card Power Distribution
5.9.1 CompactPCI Interface Requirements
5.9.2 CompactPCI Signal Interface
5.11 Chip-Select PLD Registers
A.1 System Compatibility Specifications
A.1.1 CompactPCI Specification Notes
A.3 Main Memory Specifications
A.4 Memory Configuration Specifications
A.5 PMC Interface Specifications
A.8 Environmental Specifications
A.10 Reliability/Availability Specifications
A.11 Compliance Specifications
B. Connectors, Pinouts and Switch Settings
B.1.1 PMC A Connector Interfaces
B.1.2 PMC B Connector Interfaces
B.3 Front Panel Serial Connector
B.4.1 CompactPCI J1/P1 (J9) Connector Pinout
B.4.2 CompactPCI J1/P1 (J9) Signal Descriptions
B.4.3 CompactPCI J2/P2 (J10) Connector Pinout
B.4.4 CompactPCI J2/P2 (J10) Signal Descriptions
B.4.5 CompactPCI J3/P3 (J13) Connector Pinout
B.4.6 CompactPCI J3/P3 (J13) Signal Descriptions
B.4.7 CompactPCI J5/P5 (J14) Connector Pinout
B.4.8 CompactPCI J5/P5 (J14) Signal Descriptions
B.5.2 SW501, SW502, and SW503 DIP Switches
D.1.1 Books and Specifications
D.2 Sun Microsystems Publications
D.2.1 Solaris Operating Environment
D.2.4 Netra CP2300 Board Documents
| Netra CP2300 cPSB Board Installation and Technical Reference Manual | 816-7186-12 | |
Copyright © 2004, Sun Microsystems, Inc. All rights reserved.